Magnetic resistance based memories are formed of individually accessible, switchable magnetic state elements. A common type of such element is the “magnetic tunneling junction” element (MTJ), having two stable magnetic states that are opposite from one another. Generally one of these two magnetic states is assigned to represent a binary “0” and the other assigned to represent a binary “1.” The MTJ is switched into a desired one of the two magnetic states by passing a write current through it, with the direction of the write current being the independent variable that selects the magnetic state. The two magnetic states are termed “stable” because when switched into the state the MTJ will remain at that state for an extended period, without requiring power.
The MTJ can be used as a storage element because, as the term “magnetic resistance” describes, it has an electrical resistance uniquely corresponding to its magnetic state. The MTJ is therefore read by detecting its resistance. Generally, reading is performed by passing a read current through the MTJ and measuring the resulting voltage, generally termed a “sense” or “read” voltage. The read voltage is one of a high or low value, uniquely indicating which of the two magnetic states. The read voltage is then compared to a reference voltage, generally set at the midpoint between the low value and the high value. The output of the comparator therefore indicates, assuming no noise-related error, the magnetic state of the MTJ and therefore the information (e.g., a “0” or a “1”) that it stored.
Specific types of MTJs and other types of magnetic resistance storage elements are known. Among these, spin transfer torque (STT) MTJs, or STT-MTJs, show particular promise. STT-MTJ, for example, has high read/write access speed, is compatible with metal oxide on silicon (MOS) processing, and has high read-write cycle endurance.
Although STT-MTJ (hereinafter referenced as “STJ”) memory has been long known as promising, technical difficulties relating to processing yield and reliability (e.g., meeting and maintaining acceptable bit error rate, and/or access speed) have been long known as well, standing alone and in relation to, for example, power consumption and feature size. As one example, it is has been known that lowering the supply voltage (abbreviated hereinafter as “Vdd)” may improve the reliability, and further, may decrease the power consumption of resistance-based memory. However, as described in greater detail below, it has also been long known that lowering Vdd can decrease processing yield.
As another example, it is been long known that stand-by leakage current, particularly in the current control transistors within the sensing circuits of the STJ memory, may contribute significantly to power consumption. This leakage related power consumption has been long known as particularly problematic in applications in which the STJ memory is often kept in a stand-by state—such as in a hand-held smart cellular telephone, remote monitoring station, and the like.
One conventional means for reducing this stand-by leakage current is to increase the threshold voltage (VTH) of the sensing circuit current control transistors. Another conventional means is lowering the power supply voltage, in other words, lowering Vdd. However, both of these means can significantly reduce storage accuracy, i.e., reduce processing yield. One very significant reason is that both of the means reduce the sensing margin of the STJ sensing circuits. The sensing margin is the minimum difference between the read voltage (which is either a “0” or a “1” voltage) and the reference voltage against which the read voltage is compared by the sensing amplifier. Generally, for a given STJ memory the smaller the sensing margin the higher the susceptibility of the sensing amplifier to make an error and, therefore, the lower the processing yield.
Therefore, for these and other reasons a need has long existed in the STT-MTJ memory art, and other resistance-based memory arts, for increasing processing yield and lowering power consumption without incurring certain of the costs that may be associated with known means and methods.